[olug] 2.4 kernel/ SMP and APIC

[Daniel G. Linder]

VincentR wrote:
> There's a little used feature in the 2.4 kernel which enables you to bind an
> IRQ to a specific CPU.  Why would you do this?  In my case it was because
> UDP packets in a stream were getting out of sequence due to the APIC
> allowing multiple CPU's to service interrupts on the same ethernet device.

...snip...

Another reason to do this is to squeeze that little bit of extra performance out of a SMP box while tweaking a web site.  Basically, you could bind the NIC interrupt to CPU0, and the SCSI controller interrupt to CPU1, setting processor affinity for the Apache web server processes to CPU2, and the database processes to CPU3.  The theory is that the cache of each CPU is not having to cache four processes each (ethernet code, SCSI code, httpd code, and database code), so the cache-hit rate of each should be a bit better.

I believe the only time I have seen this done is when the Linux vs. Windows shoot-off a couple years ago.  At the time, the Windows server had these options tweaked but the Linux didn't (couldn't?) at the time.  When it was redone with these tweaks on it was a couple percentage points faster -- nothing that we would notice as a human, but still a bit of a performance.

Dan